LED Matrix Driver / Documentation
LED Matrix Driver, in detail
A 128×64 RGB LED panel driver in SystemVerilog on an iCE40
Project brief
A SystemVerilog driver for a custom 128×64 RGB LED matrix on a Lattice iCE40UP5K. An STM32 streams frames over SPI; the FPGA double-buffers them, applies gamma correction, and drives the panel with 8-bit binary code modulation at 120 Hz or better, with global dimming.
The repository carries the timing and multiplexing analysis, cocotb testbenches with a Python reference oracle, and the full open-source build flow — yosys, nextpnr and icestorm.
What is included
• 8-bit binary code modulation at ≥120 Hz refresh with global dimming
• Double-buffered frame ingest over SPI from an STM32
• cocotb testbenches with a Python panel model as the reference oracle
• Fully open-source toolchain: yosys, nextpnr-ice40, icestorm, Verilator
Current status
This is a specification-stage project. The page records the intended design; implementation has not been represented as complete.
Questions and support
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